Intel® Implicit SPMD Program Compiler (Intel® ISPC)
1.13.0
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Structure that collects optimization options. More...
#include <ispc.h>
Public Member Functions | |
Opt () | |
Public Attributes | |
int | level |
bool | fastMath |
bool | fastMaskedVload |
bool | unrollLoops |
bool | force32BitAddressing |
bool | disableAsserts |
bool | disableFMA |
bool | forceAlignedMemory |
bool | disableMaskAllOnOptimizations |
bool | disableHandlePseudoMemoryOps |
bool | disableBlendedMaskedStores |
bool | disableCoherentControlFlow |
bool | disableUniformControlFlow |
bool | disableGatherScatterOptimizations |
bool | disableMaskedStoreToStore |
bool | disableGatherScatterFlattening |
bool | disableUniformMemoryOptimizations |
bool | disableCoalescing |
bool | disableZMM |
Structure that collects optimization options.
This structure collects all of the options related to optimization of generated code.
bool Opt::disableAsserts |
Indicates whether Assert() statements should be ignored (for performance in the generated code).
Definition at line 416 of file ispc.h.
Referenced by Module::execPreprocessor(), and main().
bool Opt::disableBlendedMaskedStores |
On targets that don't have a masked store instruction but do have a blending instruction, by default, we simulate masked stores by loading the old value, blending, and storing the result. This can potentially be unsafe in multi-threaded code, in that it writes to locations that aren't supposed to be written to. Setting this value to true disables this work-around, and instead implements masked stores by 'scalarizing' them, so that we iterate over the ISIMD lanes and do a scalar write for the ones that are running.
Definition at line 447 of file ispc.h.
Referenced by lReplacePseudoMaskedStore(), and main().
bool Opt::disableCoalescing |
Disables optimizations that coalesce incoherent scalar memory access from gathers into wider vector operations, when possible.
Definition at line 487 of file ispc.h.
Referenced by main(), and Optimize().
bool Opt::disableCoherentControlFlow |
Disables the 'coherent control flow' constructs in the language. (e.g. this causes "cif" statements to be demoted to "if" statements.) This is likely only useful for measuring the impact of coherent control flow.
Definition at line 453 of file ispc.h.
Referenced by Function::emitCode(), IfStmt::emitMaskAllOn(), IfStmt::emitVaryingIf(), and main().
bool Opt::disableFMA |
Indicates whether FMA instructions should be disabled (on targets that support them).
Definition at line 420 of file ispc.h.
Referenced by main(), and Target::Target().
bool Opt::disableGatherScatterFlattening |
Disables the optimization that detects when the execution mask is all on and emits code for gathers and scatters that doesn't loop over the SIMD lanes but just does the scalar loads and stores directly.
Definition at line 477 of file ispc.h.
Referenced by main(), and IsCompileTimeConstantPass::runOnBasicBlock().
bool Opt::disableGatherScatterOptimizations |
Disables the backend optimizations related to gather/scatter (e.g. transforming gather from sequential locations to an unaligned load, etc.) This is likely only useful for measuring the impact of these optimizations.
Definition at line 465 of file ispc.h.
Referenced by main(), and Optimize().
bool Opt::disableHandlePseudoMemoryOps |
If enabled, the various __pseudo* memory ops (gather/scatter, masked load/store) are left in their __pseudo* form, for better understanding of the structure of generated code when reading it.
Definition at line 437 of file ispc.h.
Referenced by main(), and Optimize().
bool Opt::disableMaskAllOnOptimizations |
If enabled, disables the various optimizations that kick in when the execution mask can be determined to be "all on" at compile time.
Definition at line 431 of file ispc.h.
Referenced by Function::emitCode(), DoStmt::EmitCode(), ForStmt::EmitCode(), IfStmt::emitMaskAllOn(), FunctionEmitContext::FunctionEmitContext(), lStoreAssignResult(), main(), Optimize(), IsCompileTimeConstantPass::runOnBasicBlock(), and FunctionEmitContext::StoreInst().
bool Opt::disableMaskedStoreToStore |
Disables the optimization that demotes masked stores to regular stores when the store is happening at the same control flow level where the variable was declared. This is likely only useful for measuring the impact of this optimization.
Definition at line 471 of file ispc.h.
Referenced by lStoreAssignResult(), and main().
bool Opt::disableUniformControlFlow |
Disables uniform control flow optimizations (e.g. this changes an "if" statement with a uniform condition to have a varying condition). This is likely only useful for measuring the impact of uniform control flow.
Definition at line 459 of file ispc.h.
Referenced by ForStmt::EmitCode(), DoStmt::EstimateCost(), ForStmt::EstimateCost(), main(), IfStmt::TypeCheck(), DoStmt::TypeCheck(), and ForStmt::TypeCheck().
bool Opt::disableUniformMemoryOptimizations |
Disables the optimizations that detect when arrays are being indexed with 'uniform' values and issue scalar loads/stores rather than gathers/scatters. This is likely only useful for measuring the impact of this optimization.
Definition at line 483 of file ispc.h.
Referenced by main(), and IndexExpr::TypeCheck().
bool Opt::disableZMM |
Disable using zmm registers for avx512 target in favour of ymm. Affects only >= 512 bit wide targets and only if avx512vl is available
Definition at line 491 of file ispc.h.
Referenced by main(), and Target::Target().
bool Opt::fastMaskedVload |
Indicates whether an vector load should be issued for masked loads on platforms that don't have a native masked vector load. (This may lead to accessing memory up to programCount-1 elements past the end of arrays, so is unsafe in general.)
Definition at line 402 of file ispc.h.
Referenced by DefineStdlib(), and main().
bool Opt::fastMath |
Indicates whether "fast and loose" numerically unsafe optimizations should be performed. This is false by default.
Definition at line 396 of file ispc.h.
Referenced by main(), BinaryExpr::Optimize(), and PrintEscapedString().
bool Opt::force32BitAddressing |
Indicates if addressing math will be done with 32-bit math, even on 64-bit systems. (This is generally noticably more efficient, though at the cost of addressing >2GB).
Definition at line 412 of file ispc.h.
Referenced by FunctionEmitContext::AddElementOffset(), FunctionEmitContext::addVaryingOffsetsIfNeeded(), FunctionEmitContext::applyVaryingGEP(), BinaryExpr::GetType(), SizeOfExpr::GetType(), NewExpr::GetValue(), lDeclareSizeAndPtrIntTypes(), lEmitBinaryPointerArith(), lGSToGSBaseOffsets(), main(), Target::SizeOf(), Target::StructOffset(), IndexExpr::TypeCheck(), and NewExpr::TypeCheck().
bool Opt::forceAlignedMemory |
Always generate aligned vector load/store instructions; this implies a guarantee that all dynamic access through pointers that becomes a vector load/store will be a cache-aligned sequence of locations.
Definition at line 426 of file ispc.h.
Referenced by Module::execPreprocessor(), FunctionEmitContext::FunctionEmitContext(), lEmitLoads(), lImproveMaskedLoad(), lImproveMaskedStore(), FunctionEmitContext::LoadInst(), main(), PrintEscapedString(), IntrinsicsOpt::runOnBasicBlock(), and FunctionEmitContext::StoreInst().
int Opt::level |
Optimization level. Currently, the only valid values are 0, indicating essentially no optimization, and 1, indicating as much optimization as possible.
Definition at line 392 of file ispc.h.
Referenced by Module::CompileFile(), FunctionEmitContext::FunctionEmitContext(), lCoalescePerfInfo(), lReplacePseudoGS(), main(), Module::Module(), and ReplaceStdlibShiftPass::runOnBasicBlock().
bool Opt::unrollLoops |
Indicates when loops should be unrolled (when doing so seems like it will make sense.
Definition at line 406 of file ispc.h.
Referenced by main(), and Optimize().